Twitter! Twitter!
Ok, I’m somewhat late to jump onto the latest fads bandwagon, but here it goes – I added a Twitter widget here on the sidebar. I blame Steve Streeting for pushing me over the edge!
Archive for 2009Twitter! Twitter!Ok, I’m somewhat late to jump onto the latest fads bandwagon, but here it goes – I added a Twitter widget here on the sidebar. I blame Steve Streeting for pushing me over the edge! Fixed function lighting in vertex shader – how?Sometime soon I’ll have to implement fixed function lighting pipeline in vertex shaders. Why? Because mixing fixed function and vertex shaders in multiple passes does not guarantee identical transformation results, thus requiring depth bias or projection matrix tweaks, which leads to various artifacts that annoy people to hell. I don’t really know why that happens, because it seems that most modern cards don’t have fixed function units, so internally they are running shaders anyway. DX9 runtime on Vista’s WDDM also seems to be only handling shaders to the driver internally. Still, for some reason somewhere the precision does not match… How such a task should be approached? My requirements are:
I looked at ATI’s FixedFuncShader sample. It’s an ubershader approach; one large (230 instructions or so) shader with static VS2.0 branching. It had some obvious places to optimize, I could get it down to 190 or so instructions, kill some rcp‘s and reduce the amount of constant storage by 2x. Still, it did not handle some things in the D3D T&L or had some issues:
Another thing I’m considering, is to combine final shader(s) from assembly fragments, with some simple register allocation. In T&L shader code, there’s only limited set of could-be-redundant computations, mostly computing world space position, camera space normal, view vector and so on (those could be used lighting, texgen or fog). Those computations can be explicitly put into separate fragments, and later fragments could just use their result. What is left then is some register allocation. A shader assembly fragment could want some temporary registers for internal use (this is simple, just give it a bunch of unused registers), also want some registers as input (from previous fragments), and save some output in registers. Again, I haven’t checked with shader performance tools, but I think, guess and hope that the drivers do additional register allocation, liveness analysis etc. when converting D3D shader bytecode into hardware format. This would mean that I can be quite sloppy with it, i.e. don’t have to implement some super smart allocation scheme. I wrote some experimental code for the shader assembly combiner and so far it looks like a reasonable approach (and not too hard either). Does that make sense? Or did everyone solve those problems eons ago already? Edit: half a year later, I wrote a technical report on how I implemented all this: http://aras-p.info/texts/VertexShaderTnL.html Quote of the daySomewhat amusing quote from gamedeff.com:
Preemptive note: Google Translate does not quite cope with it. |